Frequency modulated (FM) radio signals are well known and have been widely used for audio broadcasts, and more recently used for data broadcasts. For example, common RCC POCSAG and a paging system employing FM radio broadcast subcarriers and small power efficient receiving paging devices, e.g., wristwatch paging devices, have been successfully implemented. Use of such devices to capture and demodulate the FM radio signal has required considerable analog circuitry.
Conventional analog circuits used for FM demodulation include phase or frequency locked loops and many varieties of discriminator circuits. FM demodulation has also been conducted by use of hybrid digital-analog circuits such as pulse count demodulators and application of a digitized intermediate frequency (IF) signal to a digital FM demodulator. Generally, analog based FM demodulation suffers from large physical size requirements and digital based FM demodulation requires very high speed analog-to-digital conversion or extremely high clock speeds.
Analog demodulation of FM radio signals carries with it many of the difficulties inherent in analog circuitry. Implementation in integrated circuitry requires extensive external, i.e., off-chip, components or use of massive integrated circuit resources to implement analog devices. Also, analog circuits implemented on large multi-function integrated circuits are especially susceptible to noise or interference from other circuitry on the integrated circuit chip. Most analog demodulators require resonators provided as large off-chip components. Finally, most FM demodulation implementations, due to relatively large size, are difficult to miniaturize especially in a small paging device such as a wristwatch paging device.
FM demodulation can be divided generally into five categories: discriminator circuits with linear filters followed by envelope detectors, frequency and phase lock loops, pulse count demodulators, high speed counter demodulators, and conversion of analog IF signals to digital signals followed by digital FM demodulation. Discriminator circuits are physically large and sometimes require specific tuning. Also, if the demodulated signal is to be digitally processed, then an analog-to-digital conversion block is required. Frequency and phase lock loops require relatively large off-chip components, e.g., capacitors, and are not generally easy to implement in integrated circuitry. If the demodulated signal is to be digitally processed, then an analog-to-digital conversion block is required. Also, VCO linearity typically affects demodulation distortion. Pulse count demodulators typically employ a triggered one-shot circuit and require large off-chip components, e.g., capacitors. Such pulse count demodulators are generally applicable only to very wide band FM signals. A high speed counter-based demodulator can measure a time differential between given transitions in the FM signal, however, such timing measurement requires an extremely fast counter, i.e., driven by a very high speed clock, and requires relatively large power input and heat dissipation. Conversion of analog IF signals to digital signals followed by digital FM demodulation generally requires very high speed analog-to-digital conversion and relatively high speed digital signal processing to accomplish digital demodulation.
As may be appreciated, minimizing use of analog circuitry in an FM demodulator reduces the above-noted problems inherent in analog circuitry. Also, if an FM signal is to be ultimately applied to a digital application, such as in a paging device, it is desirable to accomplish analog-to-digital conversion at the time of demodulation, however, no such FM demodulators are presently available. Reducing such problems is generally desirable for any FM demodulator, but can be especially important in the context of small radio signal receiving devices such as wristwatch based paging devices where size and performance, i.e., data integrity and power consumption, are critical requirements. To the extent that the FM demodulator can be implemented digitally and in digital integrated circuitry, the product is improved with respect to noise immunity, overall packaging, and design versatility.